mirror of
https://github.com/Pecusx/jataricart.git
synced 2026-05-20 22:33:22 +02:00
Jakub Husak
530 lines
9.4 KiB
Plaintext
530 lines
9.4 KiB
Plaintext
; flash eeprom library
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; by JHusak , 04.01.2020
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; free to use.
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FRAME_FEEDBACK=1
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icl "lib_28sf0x0.asm"
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icl "lib_29f0x0.asm"
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icl "lib_39sf0x0.asm"
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num_mems = 3
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; CONSTANTS
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m_offsets
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; jump table
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softid_entry = 0
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softid_exit = 3
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flash_formatchip = 6
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flash_formatsector = 9
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flash_writebyte = 12
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flash_lockchip = 15
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flash_unlockchip = 18
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flash_wait_unit = 21
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; data table
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; 1 byte
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flash_sectorsizeMSB = 24
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; var bytes 0 terminated
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flash_idstr = 25
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; rw section, may be moved to ZP if needed
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M_VECTOR .word 0
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m_vendor .byte 0
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m_kind .byte 0
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; ro section again
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; Protocols for known kinds of memory:
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; 28sf0x0 protokol unlock/write
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; 39sf0x0 protokol 5555/AA;2aaa/55
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; 29f0x0 protokol 555/AA;2aa/55
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; Working scan order; scanning from the end;
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M_CHECK_VECS .word M_VECTORS_39SF, M_VECTORS_29F, M_VECTORS_28SF
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; --------------------------------------------------------------------
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;Problems to solve with writing:
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; - check flash presence
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; - flash protocol
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; - size of flash 1,2
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; - size of sector in some cases
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; - number of flashes (easy, they do not overlap)
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; All can be read by erasing memory, writing several bytes and reading them;
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; But we will rely rather on user's choice not to wear memory
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; First detection is to read raw memory and id and compare results. However, we do not want to keep all those ids to recognise.
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; Second detection is to compare contents. But not very reliable as contents may repeat.
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; And ome issues may occur when no memory inserted.
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; Eventually, for flash recognition
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; - format,
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; - write 128k-1 byte, read 2*128k-1 -> if not ff flash is 128k
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; - write 256k-1 byte, read 2*256k-1 -> if not ff flash is 256kB, else is 512kb
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;
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; ??? c parameter as format/writebyte
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; ??? for compatibility, 5555_2aaa only
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; ------------------------------------------------------------------------
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; --------------------------
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; PROCEDURE
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; x = 0 or 0x40 - flash chip address.
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; stores proper vector table pointer
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; this fails only when somebody stores vendor and product bytes
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; at the proper cells.
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; The second case is that there is no mem at all.
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; Then two cases are possible: random number OR fixed ff.
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;
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; then in the code we call lda #offset/jsr jsrtovectorproc
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.if 0
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check_type
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ldy #(2*(num_mems-1))
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?again
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sty m_iter
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?again_loop
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; store default values
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jsr flashsetbank0
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; load real values, may be random if no chip.
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lda $a000
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sta m_vendor
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lda $a001
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sta m_kind
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jsr jsrtosoftidentry
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jsr flashsetbank0
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lda $a000 ; vendor
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cmp m_vendor
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sta m_vendor
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beq ?next
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lda $a001 ; id
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cmp m_kind
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sta m_kind
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beq ?next
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bne ?OK
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?next
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ldy m_iter
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dey
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dey
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bpl ?again
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; error
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sec ; failed, no chip
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rts
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?check_again
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; if zero, decrement check_bad_counter
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sne
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dec check_bad_counter
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dec check_counter
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bne ?again_loop
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lda check_bad_counter
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cmp #CNTINIT
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; if check_counter is 0 and check_bad_counter is CNTINIT then ok, else
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; go to ?next
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bne ?next
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.endif
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check_type
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ldy #(2*(num_mems-1))
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?again
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sty ?m_iter
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lda #0
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sta ?or_val
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sta ?or_val+1
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sta ?c_iter
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lda #$ff
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sta ?and_val
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sta ?and_val+1
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?repeat
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jsr flashsetbank0
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jsr jsrtosoftidentry
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lda $A000
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sta ?_id_m
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lda $A001
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sta ?_id_m+1
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jsr jsrtosoftidexit
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lda $A000
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sta ?_no_m
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lda $A001
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sta ?_no_m+1
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lda ?_id_m
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and:sta ?and_val
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lda ?_id_m+1
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and:sta ?and_val+1
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lda ?_id_m
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ora:sta ?or_val
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lda ?_id_m+1
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ora:sta ?or_val+1
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dec ?c_iter
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bne ?repeat
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;@
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; lda #$ff
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; sta $d01a
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; lda #0
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; sta $d01a
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; jmp @-
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cpw ?and_val ?or_val
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bne ?next_chip ; empty slot, random values, no chip, check next chip
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cpw ?and_val ?_no_m
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beq ?next_chip ; the came content, stable values, no response so no chip, check next chip
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?OK
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lda ?_id_m
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sta m_vendor
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lda ?_id_m+1
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sta m_vendor+1
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lda M_CHECK_VECS+1,y
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sta M_VECTOR+1
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lda M_CHECK_VECS,y
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sta M_VECTOR
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clc
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rts
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?next_chip
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php ; store zero flag
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pla
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ldy ?m_iter
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dey
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dey
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jpl ?again
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pha ; restored zero flag
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plp
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sec
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rts
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?or_val dta 0,0
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?and_val dta 0,0
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?_id_m dta 0,0
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?_no_m dta 0,0
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?c_iter .byte 0
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?m_iter .byte 0
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jsrtosoftidexit
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lda #softid_exit
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jsr jsrtovectorproc
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lda $d013
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sta $3fa
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clc
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rts
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jsrtosoftidentry
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lda M_CHECK_VECS+1,y ; first is softid entry
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sta M_VECTOR+1
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pha
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lda M_CHECK_VECS,y ; first is softid entry
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sta M_VECTOR
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pha
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php
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rti ; jsr to tabled func
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; PROCEDURE
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; performs jump to vector table at offset in A provided
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; y passed to the procedure called
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jsrtovectorproc
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php ; preserve C
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clc
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adc M_VECTOR
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sta tmpa
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lda M_VECTOR+1
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adc #0
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plp ; restore C
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pha
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lda tmpa:#0
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pha
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php
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rti
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; a - vector value offset
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; returns y-LSB A-MSB
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getvectorvalue
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clc
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adc M_VECTOR
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tay
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lda M_VECTOR+1
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adc #0
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rts
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; --------------------------
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flashformatchip2
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ldx #$40
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dta { bit.w }
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flashformatchip1
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ldx #$0
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; --------------------------
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; PROCEDURE
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; x = 0 or 0x40 - flash chip address.
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flashformatchip
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; first check if not formatted
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stx store_x
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jsr flashcheckempty
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bcc flashformatexit
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sei
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ldx store_x
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lda #flash_formatchip
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jsr jsrtovectorproc ; preserves A
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; not needed to mva $ff flashcmp
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jsr wait4flashcheckresult ; waits for format finished
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; then check number of banks for FFs
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flashcheckempty
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lda #$3f ; this depends on flash size, $0f, $1f, $3f
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sta flashformatcounter
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flashbankloop sei
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ldx store_x
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sta flashformatcounter:$d5FF,x ; set chip (x) and bank
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; set pages count, 8kB
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ldy #$20
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; reset address
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lda #$a0
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sta flashformataddrcheck + 2
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; check whole sector against 0xff
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jsr flashchecksectorformatted_bare ; destroys x
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bcs flashformatexit ; format error if c set
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dec flashformatcounter
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bpl flashbankloop
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flashformatexit
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flashcartoff ; preserves C
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pha
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sta $d580
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lda $d013
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sta $3fa
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cli
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pla
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rts
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flashchecksectorformatted
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ldy #$10
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flashchecksectorformatted_bare
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lda #$ff
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ldx #0
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flashformataddrcheck
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cmp $a000,x
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bne flashsectorformaterror
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inx
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bne flashformataddrcheck
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FEEDBACK
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inc flashformataddrcheck + 2
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dey
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bne flashformataddrcheck
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FEEDBACKEND
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clc
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rts
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flashsectorformaterror
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jsr flashcartoff
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sec
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rts
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; --------------------------
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store_x dta 0
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; --------------------------
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; PROCEDURE
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flashformatsector
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; x - bank number 00 - 7f (even sector>>1)
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; a - page number in 128byte units $0-$3f
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; erase sector containing address bank number * $2000 + page number * 128
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stx flashformatstorex
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sei
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; calculate lower 13 bits of sector
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; (address in 8kb bank)
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ldx #0
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; convert page in A to cartridge a000-bfff address flashtmpaddr
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; 0,1 -> 0 ; 2,3 -> 256 ; 4,5 -> 512 etc
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lsr
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ora #$A0
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tay
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jsr flashsetaddr ;(x/y) store address for write byte to format sector
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;
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ldx flashformatstorex:#0 ; filled before, 8k bank number
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lda #flash_formatsector ; does not touch A,X?
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jsr jsrtovectorproc
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ldy #{ sta.w }
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jsr flashprocessbyte ; format sector INVOKED !
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jsr wait4flashcheckresult ;
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;sei
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ldx flashformatstorex
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jsr flashsetbank0
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cli
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; check if all data in sector is $ff
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flashsectorformatgood
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;jsr flashcartoff
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clc
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rts
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.macro FEEDBACK
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.if (FRAME_FEEDBACK)>=1
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php
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pha
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.if (FRAME_FEEDBACK&1)==1
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inc colbaks
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lda colbaks
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sta colbak
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.endif
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.if (FRAME_FEEDBACK&2)==2
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lda #0
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sta dmactl
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sta sdmctl
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.endif
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pla
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plp
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.endif
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.endm
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.macro FEEDBACKEND
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.if FRAME_FEEDBACK>=1
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php
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pha
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lda #0
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sta colbaks
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sta colbak
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.if (FRAME_FEEDBACK&2)==2
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lda #34 ; ???
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sta sdmctl
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sta dmactl
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.endif
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pla
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plp
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.endif
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.endm
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; ---------------------
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; PROCEDURE
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flashwritebyte
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; a - byte to write
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; x - 8kb bank to switch, $00 to $7f, also chip select
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; flashaddr - addres in flash - must be a000-offset
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; do not programm byte if already good
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sei
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sta $D500,x ; select bank, chip
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ldy #{ cmp.w }
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jsr flashprocessbyte
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bne byte_differs
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sta $D580
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cli
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clc
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rts
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byte_differs
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sta flashcmp
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sei
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pha
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lda #flash_writebyte ; preserves A,X
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jsr jsrtovectorproc
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pla
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; set right bank
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sta $D500,x
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ldy #{ sta.w }
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jsr flashprocessbyte ; WRITE BYTE INVOKED !
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wait4flashcheckresult ; sei mode
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mva #0 flashcnt ; reset counter
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sta flashcnt+1
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; ldy #1 ; first time wait short first turn to speed up byte write.
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beq skipwsync
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flashwaitfordone
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; WARNING! 29f040 erases even 10 seconds!
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; approx 100ms in overall for chip erase:
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; as many cycles needed, as 256*cycles >100ms * (1+epsilon)
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; 100 ms is 180000 cycles
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; so max 256 rough loops must last longer
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; 180000 / 256 = 703
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; 700 cycles by 6 cycles loop lasts = 116.
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; so flipipng values, and adding margin,
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; we count 128*6 cycles in inner loop.
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; max sector erase by datasheet: 25 ms
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; max chip erase by datasheet: 100 ms 39sf040
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; max chip erase by datasheet: 20 ms 28sf040
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; max chip erase by datasheet: 10000 ms 29f040
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;ldy#250
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sta WSYNC
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skipwsync
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;lda #flash_wait_unit
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;jsr jsrtovectorproc
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FEEDBACK
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;dey
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;bne @-
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ldy #{ lda.w }
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jsr flashprocessbyte
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sta flashval
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ldy #{ eor.w }
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jsr flashprocessbyte
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inc flashcnt
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bne cont
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inc flashcnt+1
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bne cont
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jsr flashcartoff
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FEEDBACKEND
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lda #$ff ; status
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rts
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cont
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and #$40
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bne flashwaitfordone
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jsr flashcartoff
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FEEDBACKEND
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lda flashval:#0
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cmp flashcmp:#0
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; when byte compare non zero = error
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rts
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flashcnt
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dta 0,0
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; ----------------------
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; PROCEDURE
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flashprocessbyte
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; y - byteop for cpu to do with byte
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; flashaddr - stored address
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sty flashbyteop
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flashbyteop
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sta flashaddr:$aaaa
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rts
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flashend
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FEEDBACKEND
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rts
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flashincaddr
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inw flashaddr
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rts
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flashsetaddr
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stx flashaddr
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sty flashaddr+1
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rts
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flashunlockchip
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lda #flash_unlockchip
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jmp jsrtovectorproc
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flashlockchip
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lda #flash_lockchip
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jmp jsrtovectorproc
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flashsetbank0
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sta $d500,x
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pha
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lda $d013
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sta $3fa
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pla
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rts
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