devel

2026-05-20 22:33:22 +02:00 · 2023-01-11 01:26:32 +01:00
parent af06f1ae1b
commit f52d101484
5 changed files with 207 additions and 76 deletions
@@ -2,28 +2,29 @@
 ; by JHusak , 04.01.2020
 ; free to use.

-; Nice to have procedures, because mads may exclude unused procedures (-x in cmdl)
-;.def STRIPPED
-
 	icl "lib_28sf0x0.asm"
 	icl "lib_29f0x0.asm"
 	icl "lib_29sf0x0.asm"
 	icl "lib_39sf0x0.asm"

-; x - 0x0 or 0x40 - chip select;
-; a - $80 - format, $90 - enter id mode, $a0 - writebyte
-C_ID_MODE equ $90
+; CONSTANTS
+m_offsets
+	softid_entry	=	0
+	softid_exit	=	3
+	flashoppreamble	=	6
+	flash_lockchip	=	9
+	flash_unlockchip	=	12

-M_SECTOR_SIZES
-	.word	M_SSIZE_28SF, M_SSIZE_29F, M_SSIZE_29SF, M_SSIZE_39SF
-M_PREAMBLE_VECS
-	.word flashoppreamble_28SF, flashoppreamble_29F, flashoppreamble_29SF, flashoppreamble_39SF
-M_PREAMBLES_ACC_VECS
-	.word flashoppreamble_acc_28SF, flashoppreamble_acc_29F, flashoppreamble_acc_29SF, flashoppreamble_acc_39SF
-M_UNLOCKMEM_VECS
-	.word flash_unlockchip_28SF, flash_unlockchip_29F, flash_unlockchip_29SF, flash_unlockchip_39SF
+; rw section, may be moved to ZP if needed
+M_VECTOR	.word 0
+tmpa		.byte 0
+m_vendor	.byte 0
+m_kind		.byte 0
+m_iter		.byte 0

+; ro section again

+M_CHECK_VECS	.word M_VECTORS_28SF, M_VECTORS_29F, M_VECTORS_29SF, M_VECTORS_39SF
 ;Problems with writing:
 ; - check flash presence
 ; - flash protocol
@@ -45,68 +46,78 @@ M_UNLOCKMEM_VECS
 ; c parameter as format/writebyte
 ; for compatibility, 5555_2aaa only

-.ifndef STRIPPED
-; flash size only needed in not stripped version for format result check.
-flash_size dta 0
-; as well as check_vendor procedure
-; 
 ; --------------------------
 ; PROCEDURE
 ; x = 0 or 0x40 - flash chip address.
-; returns c set -> failed
-; if c cleared, x=vendor, y=product code
-; there are some memories which need multiple read, but we do not abuse them.
-check_vendor
-	lda #C_ID_MODE
-	jsr flashoppreamble_acc
-	ldx $a000 ; vendor
-	ldy $a001 ; id
-	mva #$f0 $a000 ; exit read_id
-	mva #0 flash_size 
+; stores proper vector table pointer if worked
+; this fails only when somebody stores vendor and product bytes
+; at the proper cells.
+;
+; then in the code we call lda #offset/jsr jsrtoproc
+check_type
+	ldy #0-2
+?again
+	; store default values
+	sta $d500,x
+	lda $a000
+	sta m_vendor
+	lda $a001
+	sta m_kind
+	
+	iny
+	iny
+	sty m_iter

-	cpx #$BF; SST 
-	bne next1
-	; nice to store that this is SST
-	cpy #$B5
-	bne @+
-	lda #$0f
-@	cpy #$B6
-	bne @+
-	lda #$1f
-@	cpy #$B7
-	bne @+
-	lda #$3f
-@	sta flash_size
-	clc
-	rts
-next1
-.if 0
-	lda #C_ID_MODE
-	jsr flashoppreamble_acc
-	ldx $a000 ; vendor
-	ldy $a001 ; id
-	mva #$f0 $a000 ; exit read_id
-	mva #0 flash_size 
+	jsr jsrtosoftidentry

-	cpx #$BF; SST 
-	bne cvexit
-	; nice to store that this is SST
-	cpy #$24
-	bne @+
-	lda #$1f
-@	cpy #$13
-	bne @+
-	lda #$3f
-@	sta flash_size
-	clc
-	rts
-.endif
-cvexit
+	sta $d500,x
+	lda $a000 ; vendor
+	cmp m_vendor
+	bne OK
+	lda $a001 ; id
+	cmp m_kind
+	bne ?OK
+
+	ldy	m_iter
+	cpy	#$6
+	bne	?again
+	; error
 	sec
 	rts
-.endif
+?OK
+	lda	M_CHECK_VECS+1,y
+	sta	M_VECTORS+1
+	lda	M_CHECK_VECS,y
+	sta	M_VECTORS

+	lda	#softid_exit
+	jsr	jsrtoproc
+	clc
+	rts

+jsrtosoftidentry
+	lda M_CHECK_VECS+1,y ; first is softid entry
+	pha
+	lda M_CHECK_VECS,y ; first is softid entry
+	pha
+	php
+	rti ; jsr to tabled func
+; PROCEDURE
+; performs jump to vector table at offset in A provided
+; y passed to the procedure called
+jsrtoproc
+	php ; preserve C
+	clc
+	adc	M_VECTORS
+	sta	tmpa
+	lda	M_VECTORS+1
+	adc	#0
+	plp ; restore C
+	pha
+	lda	tmpa
+	pha
+	php
+	rti

 ; --------------------------
 flashformatchip2
@@ -124,6 +135,7 @@ flashformatchip
 	lda #C_FORMAT
 	jsr flashoppreamble_acc ; does not touch A
 	sta $d502,x
+	; !!!!!!!!!!!!!!!!!!! CHECK THIS !!!!!!!!!!!!!!!!!!!!
 	lda #TRIGGER_FORMAT
 	sta $b555 ; FORMAT HERE TRIGGERED!
 	; not needed to mva $ff flashcmp
@@ -1,25 +1,56 @@
-TRIGGER_FORMAT_28SF	equ $30
 C_FORMAT_28SF		equ $30
 C_BYTE_PROG_28SF	equ $10
 M_SSIZE_28SF	equ $0100 ; sector size
+;	store 
+;
+M_VECTORS_28SF
+	jmp softid_entry_28SF
+	jmp softid_exit_28SF
+	jmp flashoppreamble_28SF
+	jmp flash_lockchip_28SF
+	jmp flash_unlockchip_28SF

 flashoppreamble_28SF
-	pha
 	lda #C_BYTE_PROG_28SF
-	scc
+	bcc flashoppreamble_acc_28SF
 	lda #C_FORMAT_28SF ; only if c set
-flashoppreamble_acc_28SF ; 28SF0x0
 	sta $d500,x ; can be any address
-	sta $a000; command: FORMAT/ID_MODE/BYTE_PROG, any address
+	sta $a000; command select: FORMAT/ID_MODE/BYTE_PROG, any address
+	sta $a000; command commit: FORMAT/ID_MODE/BYTE_PROG, any address
 	rts
+flashoppreamble_acc_28SF ; 28SF0x0
+	sta $d500,x
+	sta $a000
+	rts
+read_manufacturer_28SF
+	sta D500,x ; x=0 or $40 else will read wrong
+	lda $a000
+	rts
+read_product_28SF
+	sta D500,x ; x=0 or $40 else will read wrong
+	lda $a001
+	rts
+
+softid_entry_28SF
 flash_unlockchip_28SF
-	sta $D500,x
+	sta $D500,x ; x =0 or $40, else will not unlock
 	; read from 1823H, 1820H, 1822H, 0418H, 041BH, 0419H, 041AH
+	jsr flash_lock_preamb_28SF
+	lda	$A41A
+	rts
+
+softid_xit_28SF
+flash_lockchip_28SF
+	sta $D500,x ; x =0 or $40, else will not unlock
+	jsr flash_lock_preamb_28SF
+	lda	$a40A
+	rts
+
+flash_lock_preamb_28SF
 	lda $B823
 	lda $B820
 	lda $B822
 	lda $A418
 	lda $A41B
 	lda $A419
-	lda $A41A
 	rts
@@ -3,6 +3,14 @@ C_FORMAT_29F	equ $80
 C_BYTE_PROG_29F	equ $a0
 M_SSIZE_29F	equ $10000 ; sector size; MAXFlash, protocol compatible with 39sf0x0
 command_ZP	=	$f0
+
+M_VECTORS_29F
+	jmp softid_entry_29F
+	jmp softid_exit_29F
+	jmp flashoppreamble_29F
+	jmp flash_lockchip_29F
+	jmp flash_unlockchip_29F
+
 flashoppreamble_29F
 	pha
 	lda #C_BYTE_PROG_29F
@@ -24,7 +32,7 @@ flashoppreamble_acc_29F ; 39sf0x0, 29F040
 	mva #$55 $aaaa ; $2aaa<$55
 	; $5555<$80
 	sta $d502,x
-	mva command_ZPff $b555; will become command: FORMAT/ID_MODE/BYTE_PROG
+	mva command_ZP $b555; will become command: FORMAT/ID_MODE/BYTE_PROG
 	cmp #C_FORMAT_29F
 	bne @+ ; if not FORMAT, procedure finishes
 	; FORMAT part, more to write
@@ -36,3 +44,25 @@ flashoppreamble_acc_29F ; 39sf0x0, 29F040
 	tax
 flash_unlockchip_29F
 	rts
+
+;read_manufacturer_29F
+;	sta D500,x ; x=0 or $40 else will read wrong
+;	lda $a000
+;	rts
+
+;read_product_29F
+;	sta D500,x ; x=0 or $40 else will read wrong
+;	lda $a001
+;	rts
+
+
+softid_exit_29F
+	sta D500,x ; x=0 or $40 else will read wrong
+	lda #$f0
+	sta $a000
+	rts
+
+softid_entry_29F
+	lda #$90
+	bne flashoppreamble_acc_29F
+
@@ -1,8 +1,15 @@
-TRIGGER_FORMAT_29SF	equ $10
 C_FORMAT_29SF		equ $80
 C_BYTE_PROG_29SF	equ $a0
 M_SSIZE_29SF	equ $0080 ; sector size
 command_ZP	=	$f0
+
+M_VECTORS_29SF
+	jmp softid_entry_29SF
+	jmp softid_exit_29SF
+	jmp flashoppreamble_29SF
+	jmp flash_lockchip_29SF
+	jmp flash_unlockchip_29SF
+
 flashoppreamble_29SF
 	pha
 	lda #C_BYTE_PROG_29SF
@@ -33,3 +40,25 @@ flashoppreamble_acc_29SF ; 29sf040
 	tax
 flash_unlockchip_29SF
 	rts
+
+;read_manufacturer_29SF
+;	sta D500,x ; x=0 or $40 else will read wrong
+;	lda $a000
+;	rts
+
+;read_product_29SF
+;	sta D500,x ; x=0 or $40 else will read wrong
+;	lda $a001
+;	rts
+
+softid_exit_29SF
+	sta D500,x ; x=0 or $40 else will read wrong
+	lda #$f0
+	sta $a000
+	rts
+
+
+softid_entry_29SF
+	lda #$90
+	bne flashoppreamble_acc_29SF
+
@@ -4,6 +4,13 @@ C_BYTE_PROG_39SF	equ $a0
 M_SSIZE_39SF	equ $1000 ; sector size
 command_ZP	=	$f0

+M_VECTORS_39SF
+	jmp softid_entry_39SF
+	jmp softid_exit_39SF
+	jmp flashoppreamble_39SF
+	jmp flash_lockchip_39SF
+	jmp flash_unlockchip_39SF
+
 flashoppreamble_39SF
 	pha
 	lda #C_BYTE_PROG_39SF
@@ -37,3 +44,25 @@ flashoppreamble_acc_39SF ; 39sf0x0, 29F040
 	tax
 flash_unlockchip_39SF
 	rts
+
+;read_manufacturer_39SF
+;	sta D500,x ; x=0 or $40 else will read wrong
+;	lda $a000
+;	rts
+
+;read_product_39SF
+;	sta D500,x ; x=0 or $40 else will read wrong
+;	lda $a001
+;	rts
+
+softid_exit_39SF
+	sta D500,x ; x=0 or $40 else will read wrong
+	lda #$f0
+	sta $a000
+	rts
+
+
+softid_entry_39SF
+	lda #$90
+	bne flashoppreamble_acc_39SF
+