rewritten flash recognition procedure

updated flasher to handle all chip configuration.

README.md

@@ -15,7 +15,7 @@ The banking scheme was chosen because it is very simple to handle with 3 raw TTL
 The cartridge is driven by addresses D500-D580; write to D500 sets the first bank - this is default boot bank. Write to D501 sets second bank etc. The max bank is set by write to D57F; write to D580 switches off the cartridge. The banks may have repeated contents if there are less of them than 128.
 
 The J(atari)Cart first came in size max 256 kB (6 line flip flop); then the second version of pcb was created with 8-bit flip-flop with max capacity of 1MB.
-Current Atari-programmable cartridge pcbs are gold-plated J(atari)cart1MB ones. They have two memory chip sockets available. In first socket you can place either 27c0x0 prom for read only memory (then there is no possibility to program it by Atari machine, you must use external prom programmer) or flash eeprom for read-write memory. In second socket you can place either flash or prom read only memory as well. Or nothing. The first (boot) memory can be hardware write-protected, when you want to have rom functionality in first half, but want to use flash memories. There is no such feature for second memory chip (always possible read/write when flash chip used).
+Current Atari-programmable cartridge pcbs are double gold-plated J(atari)cart1MB ones. They have two memory chip sockets available. In first socket you can place either 27c0x0 prom for read only memory (then there is no possibility to program it by Atari machine, you must use external prom programmer) or flash eeprom for read-write memory. In second socket you can place either flash or prom read only memory as well. Or nothing. The first (boot) memory can be hardware write-protected, when you want to have rom functionality in first half, but want to use flash memory chips. There is no such feature for second memory chip (always possible read/write when flash chip used).
 
 However and ever, you can sit two 39SF040 or 29F040 flash chips to have 1 MB of flash memory, (almost: old MaxFlash booting from last bank) fully (Maxflash newer, boot bank 0) compatible with Atari MaxFlash Cartridges (Space Harrier fully supported!), always first boot bank, remember? In fact, many 1MB cartidge images have a bootstrap in the first or last bank, switching to the right boot bank first, making the images independent on cartridge type. 28SF040 has different protocol, so it is not writable by games designed for AtariMaxFlash.
 
@@ -23,7 +23,7 @@ Summary:
 - first chip can be hardware write-protected even if flash installed (JCart1024)
 - second chip has no hardware write protection (JCart1024)
 - both chips can be totally different (JCart1024)
-- most 28x, 29x, 39x family work, but for now flashing software is prepared to work with 39sf0x0, 29f0x0, 28sf0x0 memories.
+- most 28x, 29x, 39x family work, but for now flashing software is prepared to work with 39sf0x0, 29f0x0, 28sf0x0 memory chips.
 
 The internal construction of JatariCart256kB allows utilize max 256kB of flash memory (32 banks) of PROM/EPROM memory (they are not available anymore, however)
 The internal construction of JatariCart1MB allows utilize max 1MB of flash memory (128 banks) of PROM/EPROM memory.

lib/flashwrite.asx

@@ -55,7 +55,7 @@ STARTFLASHWRITE
 	TITLE+128
 	dta $9b,c'JatariCart/MaxFlash flasher'
 	dta $9b
-	dta c'by JHusak, 10.02.2023'
+	dta c'by JHusak, version 26.01.2025'
 	dta $9b
 	dta c'JatariCart of size '
 	.print "#define	CARTSIZE1	0x",*-$2000+6
@@ -72,7 +72,7 @@ STARTFLASHWRITE
 	bcc ?wloop
 
 	ldx #$25
-?lloop
+?lloop	; wait 0.5 sec after inserting
 	bit VCOUNT
 	bmi *-3
 	bit VCOUNT
@@ -81,39 +81,45 @@ STARTFLASHWRITE
 	bne ?lloop
 
 	jsr print
-	dta c' inserted.',$9b,0
+	dta $9b,c'Inserted.',$9b,0
 	
 	; cart inserted, fake it was not changed
 	jsr accept_bank_change
 
 	ldx #0 ; chip address
-	stx numchips
+	stx numgoodchipsneeded
 _check_chips
 	stx _storex
 	jsr check_type
-	bcc ?_next
+	bcc ?chip_ok
+	beq ?unrecog2
+?unrecog1
 	jsr print
-	dta c'unrecognized chip: ',0
+	dta c'no chip #'
-	lda m_vendor
+?chipign1
-	jsr printhex
+	dta c'1, ignoring... ',0
-	lda m_kind
-	jsr printhex
-	cpx #$0
-	seq
-		jmp *
-	jsr print
-	dta c'ignoring chip ...',0
-	jmp menu
-?_next	inc numchips
-	lda numchips
 	clc
-	adc #'0'
+	bcc ?common
-	sta chipno ; stored as '0'/'1' to print inline
 
+?unrecog2
 	jsr print
-	dta c'chip '
+	dta c'unknown chip #'
-chipno
+?chipign2
-	dta c'0' ; will be replaced
+	dta c'1 protocol, ignoring...',0
+
+?common
+	lda #0
+	sta m_vendor
+	sta m_kind
+	jmp ?exit
+?chip_ok
+	lda numgoodchipsneeded
+	ora goodchipsmask
+	sta numgoodchipsneeded
+	jsr print
+	dta c'chip #'
+?chipno
+	dta c'1' ; will be incremented if TWOCHIPS defined
 	dta c' vend/prod: ',0
 	lda m_vendor
 	jsr printhex
@@ -131,7 +137,7 @@ chipno
 	adc #0
 	sta ?taddr+1
 	ldy #0
-?loop	; write string onscreen till 0
+?loop	; write string onscreen, 0-ended
 	lda ?taddr:$ffff,y
 	beq ?exit
 	sty st_y
@@ -142,22 +148,52 @@ chipno
 ?exit
 	jsr printnl
 	ldx _storex
-	cpx #0
+
-	bne menu
+	asl goodchipsmask
+
+	cpx #$40
+	beq menu
 	lda m_vendor
 	sta t_vendor
 	lda m_kind
 	sta t_kind
+	inc ?chipno
+	inc ?chipign1
+	inc ?chipign2
 	ldx #$40
 	jmp _check_chips
 menu
+	lda numgoodchipsneeded
+	.if .def TWOCHIPS
+	cmp #3 ; two chips needed
+	.else
+	and #1
+	cmp #1 ; at least first chip needed
+	.endif
+	beq ?cont
+
+	; FAIL and loop forever
+	jsr print
+	dta $9b
+	dta c'Sorry, recognized chip configuration',$9b
+	dta c'does not suit your binary.',$9b
+	dta c'Your cart needs '
+	.if .def TWOCHIPS
+	dta c'two chips.',$9b
+	.else
+	dta c'at least first chip.',$9b
+	.endif
+	dta c'Please reboot.',$9b,0
+	jmp *
+
+?cont
 	jsr printnl
 	;lda #$ff
 	;sta $d301
 	
 	jsr print
 	dta c'Press:',$9b
-	dta c'START  - format cart and programm',$9b
+	dta c'START  - cartridge format and flash!',$9b
 	;dta c'SELECT - verify; repair bad blocks.',$9b
 	dta c'OPTION - verify',$9b,0
 ?wloop	lda 53279
@@ -224,7 +260,8 @@ CHECKONLY
 
 t_vendor	.byte 0
 t_kind		.byte 0
-numchips	.byte 0
+numgoodchipsneeded	.byte 0
+goodchipsmask	.byte 1
 _storex		.byte 0
 
 crcsums

lib/flashwritelib.asx

@@ -30,7 +30,6 @@ m_offsets
 M_VECTOR	.word 0
 m_vendor	.byte 0
 m_kind		.byte 0
-m_iter		.byte 0
 
 ; ro section again
 ; Protocols for known kinds of memory:
@@ -66,17 +65,22 @@ M_CHECK_VECS	.word  M_VECTORS_39SF, M_VECTORS_29F, M_VECTORS_28SF
 ; --------------------------
 ; PROCEDURE
 ; x = 0 or 0x40 - flash chip address.
-; stores proper vector table pointer if worked
+; stores proper vector table pointer
 ; this fails only when somebody stores vendor and product bytes
 ; at the proper cells.
+; The second case is that there is no mem at all.
+; Then two cases are possible: random number OR fixed ff.
 ;
 ; then in the code we call lda #offset/jsr jsrtovectorproc
+	.if 0
 check_type
 	ldy #(2*(num_mems-1))
 ?again
 	sty m_iter
+?again_loop
 	; store default values
-	jsr flashsetbank
+	jsr flashsetbank0
+	; load real values, may be random if no chip.
 	lda $a000
 	sta m_vendor
 	lda $a001
@@ -84,7 +88,7 @@ check_type
 	
 	jsr jsrtosoftidentry
 
-	jsr flashsetbank
+	jsr flashsetbank0
 	lda $a000 ; vendor
 	cmp m_vendor
 	sta m_vendor
@@ -100,13 +104,108 @@ check_type
 	dey
 	bpl	?again
 	; error
-	sec
+	sec	; failed, no chip 
 	rts
+
+?check_again
+	; if zero, decrement check_bad_counter
+	sne
+	dec check_bad_counter
+	dec check_counter
+	bne ?again_loop
+	lda check_bad_counter
+	cmp #CNTINIT
+	; if check_counter is 0 and check_bad_counter is CNTINIT then ok, else
+	; go to ?next
+	bne ?next
+	.endif
+
+
+
+check_type
+	ldy #(2*(num_mems-1))
+?again
+	sty ?m_iter
+
+	lda #0
+	sta ?or_val
+	sta ?or_val+1
+	sta ?c_iter
+	lda #$ff
+	sta ?and_val
+	sta ?and_val+1
+?repeat
+	jsr flashsetbank0
+	jsr jsrtosoftidentry
+
+	lda $A000
+	sta ?_id_m
+	lda $A001
+	sta ?_id_m+1
+
+	jsr jsrtosoftidexit
+
+	lda $A000
+	sta ?_no_m
+	lda $A001
+	sta ?_no_m+1
+
+	lda ?_id_m
+	and:sta ?and_val
+
+	lda ?_id_m+1
+	and:sta ?and_val+1
+
+	lda ?_id_m
+	ora:sta ?or_val
+
+	lda ?_id_m+1
+	ora:sta ?or_val+1
+	
+
+	dec ?c_iter
+	bne ?repeat
+;@
+;	lda #$ff
+;	sta $d01a
+;	lda #0
+;	sta $d01a
+;	jmp @-
+	cpw ?and_val ?or_val
+	bne ?next_chip ; empty slot, random values, no chip, check next chip
+	cpw ?and_val ?_no_m
+	beq ?next_chip ; the came content, stable values, no response so no chip, check next chip
+
 ?OK
+	lda ?_id_m
+	sta m_vendor
+	lda ?_id_m+1
+	sta m_vendor+1
 	lda	M_CHECK_VECS+1,y
 	sta	M_VECTOR+1
 	lda	M_CHECK_VECS,y
 	sta	M_VECTOR
+	clc
+	rts
+
+?next_chip
+	php ; store zero flag
+	pla
+	ldy ?m_iter
+	dey
+	dey
+	jpl ?again
+	pha ; restored zero flag
+	plp
+	sec
+	rts
+
+?or_val	dta	0,0
+?and_val	dta	0,0
+?_id_m	dta	0,0
+?_no_m	dta	0,0
+?c_iter		.byte 0
+?m_iter		.byte 0
 
 jsrtosoftidexit
 	lda	#softid_exit
@@ -116,10 +215,14 @@ jsrtosoftidexit
 	clc
 	rts
 
+	
+
 jsrtosoftidentry
        lda M_CHECK_VECS+1,y ; first is softid entry
+       sta M_VECTOR+1
        pha
        lda M_CHECK_VECS,y ; first is softid entry
+       sta M_VECTOR
        pha
        php
        rti ; jsr to tabled func
@@ -254,7 +357,7 @@ flashformatsector
 	;sei
 
 	ldx flashformatstorex
-	jsr flashsetbank
+	jsr flashsetbank0
 
 	cli
 	; check if all data in sector is $ff
@@ -416,7 +519,7 @@ flashlockchip
 	lda #flash_lockchip
 	jmp jsrtovectorproc
 
-flashsetbank
+flashsetbank0
 	sta $d500,x
 	pha
 	lda $d013