added strid
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@@ -0,0 +1,340 @@
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; flash eeprom library
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; by JHusak , 04.01.2020
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; free to use.
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icl "lib_28sf0x0.asm"
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icl "lib_29f0x0.asm"
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icl "lib_29sf0x0.asm"
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icl "lib_39sf0x0.asm"
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; CONSTANTS
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m_offsets
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softid_entry = 0
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softid_exit = 3
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flashoppreamble = 6
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flash_lockchip = 9
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flash_unlockchip = 12
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flash_idstr = 15
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; rw section, may be moved to ZP if needed
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M_VECTOR .word 0
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tmpa .byte 0
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m_vendor .byte 0
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m_kind .byte 0
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m_iter .byte 0
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; ro section again
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M_CHECK_VECS .word M_VECTORS_28SF, M_VECTORS_29F, M_VECTORS_29SF, M_VECTORS_39SF
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;Problems with writing:
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; - check flash presence
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; - flash protocol
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; - size of flash 1,2
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; - size of sector in some cases
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; - number of flashes (easy, they do not overlap)
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; All can be read by erasing memory, writing several bytes and reading them
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; For flash recognition
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; - format,
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; - write 128 kbytes, read more -> if not ff, flash is 128k
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; - write additional 128KB, read more ->if not ff flash is 256kB, else is 512kb
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;
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; First detection is to read raw memory and id and compare results. Some issues may occur when no memory inserted.
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;flash_detect_protocol:
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; lda #ID_MODE
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; jsr flashoppreamble_5555_2aaa
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; c parameter as format/writebyte
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; for compatibility, 5555_2aaa only
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; --------------------------
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; PROCEDURE
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; x = 0 or 0x40 - flash chip address.
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; stores proper vector table pointer if worked
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; this fails only when somebody stores vendor and product bytes
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; at the proper cells.
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;
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; then in the code we call lda #offset/jsr jsrtoproc
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check_type
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ldy #0-2
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?again
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; store default values
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sta $d500,x
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lda $a000
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sta m_vendor
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lda $a001
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sta m_kind
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iny
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iny
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sty m_iter
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jsr jsrtosoftidentry
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sta $d500,x
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lda $a000 ; vendor
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cmp m_vendor
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bne OK
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lda $a001 ; id
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cmp m_kind
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bne ?OK
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ldy m_iter
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cpy #$6
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bne ?again
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; error
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sec
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rts
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?OK
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lda M_CHECK_VECS+1,y
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sta M_VECTORS+1
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lda M_CHECK_VECS,y
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sta M_VECTORS
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lda #softid_exit
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jsr jsrtoproc
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clc
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rts
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jsrtosoftidentry
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lda M_CHECK_VECS+1,y ; first is softid entry
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pha
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lda M_CHECK_VECS,y ; first is softid entry
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pha
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php
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rti ; jsr to tabled func
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; PROCEDURE
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; performs jump to vector table at offset in A provided
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; y passed to the procedure called
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jsrtoproc
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php ; preserve C
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clc
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adc M_VECTORS
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sta tmpa
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lda M_VECTORS+1
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adc #0
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plp ; restore C
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pha
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lda tmpa
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pha
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php
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rti
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; --------------------------
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flashformatchip2
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ldx #$40
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dta { bit.w }
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flashformatchip1
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ldx #$0
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; --------------------------
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; PROCEDURE
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; x = 0 or 0x40 - flash chip address.
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flashformatchip
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sei
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stx store_x
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lda #C_FORMAT
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jsr flashoppreamble_acc ; does not touch A
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sta $d502,x
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; !!!!!!!!!!!!!!!!!!! CHECK THIS !!!!!!!!!!!!!!!!!!!!
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lda #TRIGGER_FORMAT
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sta $b555 ; FORMAT HERE TRIGGERED!
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; not needed to mva $ff flashcmp
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jsr wait4flashcheckresult ; waits for format finished
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; then check number of banks for FFs
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lda #$3f ; this depends on flash size, $0f, $1f, $3f
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sta flashformatcounter
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flashbankloop sei
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ldx store_x
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flashformatcounter equ*+1
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sta $d5FF,x ; set chip (x) and bank
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; set pages count
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ldy #$20
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; reset address
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lda #$a0
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sta flashformataddrcheck + 2
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; check whole sector against 0xff
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jsr flashchecksectorformatted_bare ; destroys x
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bcs flashformatexit ; format error if c set
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dec flashformatcounter
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bpl flashbankloop
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flashformatexit jmp flashcartoff ; preserves C
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store_x dta 0
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; --------------------------
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; PROCEDURE
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flashformatsector
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; x - bank number 00 - 7f (even sector>>1)
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; a - erase 4KB from $B000 if A=$B0, FROM $A000 IF A=$A0
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; format 4kb evensector
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; strange form - easily maps to cartridge banks
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; to format bank, must format sector (x<<1) and (x<<1) +1
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; IT IS LONG because it has to be save, ie not format if formatted etc.
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; first check if all ff
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; this is to avoid wear
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stx flashformatstorex
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sta flashformatstorea
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sei
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sta $d500,x
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; store #$a0 or #$b0
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sta flashformataddrcheck + 2
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jsr flashchecksectorformatted
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bcc flashsectorformatgood
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sei
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flashformatstorex equ * + 1
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ldx #0 ; filled before
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; check least sector bit
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lda #C_FORMAT
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jsr flashoppreamble_acc ; does not touch A,X
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sta $D500,x
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; A must be either $A0 or $B0
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flashformatstorea equ * + 1
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lda #0 ; filled before
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sta flashtmpaddr+1
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sta flashformataddrcheck + 2
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lda #$30
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flashtmpaddr equ *+1
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sta $a000 ; SECTOR FORMAT INVOKED HERE!
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jsr wait4flashcheckresult ;
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sei
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lda flashformatstorea
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sta flashformataddrcheck+2
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ldx flashformatstorex
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sta $d500,x
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; check if all data in sector is $ff
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flashchecksectorformatted
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ldy #$10
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flashchecksectorformatted_bare
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lda #$ff
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ldx #0
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flashformataddrcheck
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cmp $a000,x
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bne flashsectorformaterror
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inx
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bne flashformataddrcheck
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inc flashformataddrcheck + 2
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dey
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bne flashformataddrcheck
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flashsectorformatgood
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jsr flashcartoff
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clc
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rts
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flashsectorformaterror
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jsr flashcartoff
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sec
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rts
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; ---------------------
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; PROCEDURE
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flashwritebyte
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; a - byte to write
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; x - 8kb bank to switch, $00 to $7f, also chip select
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; flashaddr - addres in flash - must be a000-offset
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; do not programm byte if already good
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sei
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sta $D500,x ; select bank, chip
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ldy #{ cmp.w }
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jsr flashprocessbyte
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bne byte_differs
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sta $D580
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cli
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clc
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rts
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byte_differs
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sta flashcmp
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sei
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pha
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lda #C_BYTE_PROG
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jsr flashoppreamble_acc ; preserves A,X
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pla
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; set right bank
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sta $D500,x
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ldy #{ sta.w }
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jsr flashprocessbyte ; WRITE BYTE INVOKED !
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wait4flashcheckresult ; sei mode
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mva #0 flashcnt
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ldy #1 ; first time wait short first turn to speed up byte write.
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bne @+
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flashwaitfordone
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; approx 100ms in overall for chip erase:
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; as many cycles needed, as 256*cycles >100ms * (1+epsilon)
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; 100 ms is 180000 cycles
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; so max 256 rough loops must last longer
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; 180000 / 256 = 703
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; 700 cycles by 6 cycles loop lasts = 116.
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; so flipipng values, and adding margin,
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; we count 128*6 cycles in inner loop.
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; max sector erase by datasheet: 25 ms
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; max chip erase by datasheet: 100 ms
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ldy#250
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@ dey
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nop
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bne @-
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@ ldy #{ lda.w }
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jsr flashprocessbyte
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sta flashval
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ldy #{ eor.w }
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jsr flashprocessbyte
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inc flashcnt
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bne @+
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sta $d580
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lda #$ff ; status
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rts
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@
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and #$40
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bne flashwaitfordone
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sta $d580
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flashval equ *+1
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lda #0
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flashcmp equ *+1
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cmp #0
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; when byte compare non zero = error
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rts
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flashcnt
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dta 0
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; ----------------------
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; PROCEDURE
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flashprocessbyte
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; y - byteop for cpu to do with byte
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; flashaddr - stored address
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sty flashbyteop
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flashaddr equ *+1
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flashbyteop
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sta $aaaa
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rts
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flashincaddr
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inw flashaddr
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rts
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flashsetaddr
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stx flashaddr
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sty flashaddr+1
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rts
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flashcartoff
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pha
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sta $d580
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lda $d013
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sta $3fa
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cli
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pla
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rts
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